With the improvement of semiconductor manufacturing and the development of the art of CMOS semiconductor devices, the size of semiconductors has become smaller and smaller. It has become necessary to introduce the stress technology of silicon into the manufacturing process of semiconductors for improving the performance of the devices. At present, the ordinary stress technology of silicon in PMOS devices is the SiGe process. SiGe process is with great effect of radio frequency.
Moreover, to its high price-performance ratio, it is widely used in the markets of mobile telecommunication, satellite positioning and RFID (Radio Frequency IDentification). Furthermore, the SiGe process can be integrated into the common mixed analog-digital circuits, which is adopted to manufacture full functional SoC chips (system on chip). It has become a hot topic for utilizing SiGe to manufacture radio frequency integrated circuit and has become a hot spot for research all over the world. Bandwidth and frequency become more and higher due to the wide application of radio. Hence, it is important to research the application of the radio of broadband and ultra-wideband.
The manufacturing process requires forming a trench of silicon on the wafer. The shape of a present trench is U-shape or Σ-shape. In prior known methods, dry etching is used to form the U-shaped trench. In such methods, a layer of hard mask is prefabricated. When the trench is formed, the layer of hard mask has to be removed. Consequently, as a result, the cost thereof is relatively high. Furthermore, it is easy to break the monocrystalline silicon when etching, and the nucleation of SiGe is affected. Therefore, it causes some adverse effect in the manufacturing products.
China Patent (CN 102683180A) discloses a method for etching the trench and a method for manufacturing the semiconductor device. The method comprises coating photo-resist with a certain thickness on a silicon wafer, forming a pattern for etching a channel of the photo-resist, and executing plasma etching by utilizing the photo-resist on which the pattern is formed. The specific thickness of the photo-resist and the etching energy in a plasma etching process are controlled, so that the photo-resist is consumed by plasma to etch a silicon wafer below the photo-resist.
This provides a method of forming the trench with a circular contour, the etching rate is low in the actual process of etching, and there is no protection in the process of etching. As such, it is likely to damage the other parts of the layer which do not need to be etched. Consequently, there are some limitations with this method.
China Patent (CN 102254817A) discloses a method for manufacturing the trench that includes providing a silicon substrate, growing oxides or nitrides on the silicon substrate, coating a photoresist, allowing the photoresist to form a pattern, performing trench etching by use of the photoresist mask which forms the patterns, removing the photoresist mask, washing, and performing hydrogen annealing.
This method requires a long time to form the trench and the etching rate is low. As such, this method is not suitable for the development of the semiconductor industry in manufacturing the trench.